This invention is directed to power amplifying circuitry.
Single-ended, push-pull (abbreviated SEPP hereafter) power amplifying circuitry, especially Class-B SEPP power amplifier circuitry has frequently been used for audio power amplification. In particular, a Class-B SEPP power amplifier circuit has been used which passes a fixed idling current for effective power efficiency, but is biased to perform Class-B operation.
Class-B, SEPP power amplifier circuitry tends to develop switching distortion during the switching of the transistors, this being attributable to the carrier storage effect of the transistors. Therefore, there has been employed a power amplifier circuit as shown in FIG. 1, in which a diode 5 is connected between the emitter of a transistor 1 and the collector of a transistor 3 to form an inverted Darlington connection between the transistors. The collector of transistor 3 is connected to a load 7 through a resistor 6. Further, a diode 8 is connected between the emitter of a transistor 2 and the collector of a transistor 4 to form an inverted Darlington connection between transistors 2 and 4. The collector of transistor 4 is connected to load 7 through a resistor 9. A fixed voltage, bias circuit 11 is connected between the bases of transistors 1 and 2. The foregoing elements comprise the prior art SEPP power amplifier circuit where resistor 10 is connected between the emitters of transistors 1 and 2.
When the positive half cycle of an input signal is applied, transistors 1, 2, 3, and 4 are not turned off at the no-input signal level thereof nor are they turned off at the no-input signal level when the negative half cycle is applied. When the positive half cycle is being applied, transistors 1 and 3 supply power to the load and when the negative half cycle is being applied, transistors 2 and 4 supply power to the load, and operate at virtually the same power efficiency as Class-B operation. Thus, since transistors 1, 2, 3, and 4 are not turned on and off, switching distortion due to the switching of transistors does not occur.
However, diodes 5 and 8, on the other hand, are respectively turned off during the negative and positive half cycles of the input signal. Thus, the switching currents of diodes 5 and 8, that flow in the opposite direction of the diodes due to the carrier storage effect of the diodes (for example, when the negative half cycle of the input signal changes to the positive half cycle, as shown by the arrow A in FIG. 1), flow to transistors 1 and 2 and are amplified by transistors 3 and 4. Switching distortion due to the diodes results.
Thus, one object of this invention is to eliminate the above-mentioned shortcoming and to provide improved power amplifier circuitry that operates at virtually the same efficiency as Class-B amplifier operation and that does not develop switching distortion due not only to transistors but also to diodes. This objective is achieved in accordance with a first aspect of the present invention by rapidly switching diodes by providing a current circuit for passing the switching current during the OFF time of the diodes.
As stated above, it is known to provide a Class-B, SEPP power amplifier circuit which passes a fixed idling current for effective power efficiency, but is biased to perform Class-B operation. However, in the case of the Class-B, SEPP power amplifier circuit, if idling currents are ignored, the transistors supplying power to the load are different during the positive half cycle of the input signal and the negative half cycle thereof and switching of transistors occurs corresponding to the switching between the positive and negative half cycles. Thus, switching distortion does occur due to a carrier storage effect, etc. of the transistors.
A further object of the present invention is to provide improved circuitry for eliminating the above shortcoming and to provide improved power amplifier circuitry that operates at virtually the same power efficiency as Class-B operation, prevents transistor switching that corresponds to the switching of the positive and negative half cycles of the input signal, and, at the same time, maintains all transistors in an ON-state until the high output power time even for a low impedance load so as not to produce switching distortion.
Other objects and advantages of this invention will be apparent from a reading of the following specification and claims taken with the drawing.